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A Note on Output Compare (PWM) Module of PIC24E

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A while ago on www.controlsystemslab.com (no longer maintained), we present an article on DC motor open-loop speed control , using a simple voltage command from ADC to drive the H-bridge driver. The PWM output is generated from output compare module of the dsPIC30F2010. That 16-bit digital signal processor is now quite dated. The reader would want to implement the scheme on a newer microcontroller. At the time of this writing, PIC24EP (and dsPIC33E) series from Microchip is the latest product in the 16-bit range that could run at 70 MIPS performance. For those who want to port the code to PIC24EP, unfortunately, you have to modify the ADC and PWM routines. In this article we focus on the latter.
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VHDL code for quadrature encoder receiver module

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Original document: Quadrature Encoder Receiver Module : An Implementation on FPGA (.pdf) In the original document cited above, we discussed some designs of quadrature encoder receiver module where Verilog code listings were included. This supplementary article provides the same implementations using VHDL. The development flows remain the same for both design A and B, so we basically list the codes and show simulation results here without repeating the design details. Design A For Design A, the receiver module generates pulses at output pin U (up) or D (down), corresponding to whether A leads B, or A lags B, respectively (*). We showed the design process using STG (State Transition Graph) that yielded the results in equation (1) – (4) . The VHDL code for this implementation is in Listing 1 with simulation result shown in Figure 1. (The synthesis and behavioral simulation was performed using Xilinx Webpack 13.4 and Isim simulation, which could be downloaded from Xilinx website . (...
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Configure PIC24E to run at 70 MIPS

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Since Microchip introduced their PIC24EP family of products, it took a while before they became available from major vendors in Thailand. This family (and its close relatives dsPIC33EP) is attractive for its 70 MIPS performance. It could not run at that speed right out of the package, considering a user's choice of setup (such as oscillator type and frequency). So in this brief article, we show an example on how to configure PIC24EP to 70 MIPS. A PIC24EP256MC202 is used on our prototype, with 2 clock choices: the 7.37 MHz on-chip Internal Fast RC (FRC) oscillator, and an external 8 MHz crystal.
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